IP NAME | IP Description | Vendor Name | Datasheet download | |
1 | C-PHY D-PHY Combo V1.1 (2.5 Gbps) / V2.0 (4.5 Gbps) | 10 NM 8 NM 7 NM 5 NM |
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2 | C-PHY D-PHY Combo V1.1 (2.5 Gbps) / V1.2 (2.5 Gbps) | 14 NM |
SILVACO | |
3 | D-PHY V1.2, 2.1 Gbps | 14 NM 11 NM |
SILVACO | |
4 | M-PHY G4, 12.0 Gbps (UFS only) | 14 NM 10 NM 8 NM 7 NM 5 NM |
SILVACO | |
5 | M-PHY G3, 6.0 Gbps (UFS only) | 14 NM 11 NM 10 NM 8 NM |
SILVACO | |
6 | HBM2e, 3.2 Gbps | SILVACO | ||
7 | LPDDR4/4X/5, 5.5 Gbps, 16-bit | 14 NM |
SILVACO | |
8 | LPDDR4/4X, 4.3 Gbps, 16/32-bit | 14 NM 11 NM 10 NM 8 NM |
SILVACO | |
9 | DDR/LPDDR3 Combo, 1.6 Gbps, 32-bit | 14 NM 11 NM |
SILVACO | |
10 | LPDDR3/4, 4.3 Gbps, 16/32-bit | 28NM 10 NM 8 NM |
SILVACO | |
11 | DDR3/4, 3.2 Gbps, 32/64-bit | 28NM 10 NM 8 NM |
SILVACO | |
12 | PCIe Gen 3/4, 16 Gbps | 10 NM 8 NM 7 NM 5 NM |
SILVACO | |
13 | PCIe Gen 3, 8 Gbps | 14 NM 11 NM |
SILVACO | |
14 | DDR5 DIMM Chipset |
The Rambus DDR5 DIMM memory interface chipset is tailored for the high-capacity, high-speed performance requirements of the latest generation DDR5 memory systems. Our chips enable server and client computing systems to handle the most demanding workloads and applications. |
Rambus | |
15 | DDR4 数据缓冲器 | 我们最近从 Inphi 收购的 DDR4 数据缓冲器旨在为实时内存密集型应用提供强大的性能,实现领先的 I/O 性能和裕度。该数据缓冲器兼容 DDR4 LRDIMM,是高性能、大容量企业和数据中心系统的理想选择。 |
Rambus | |
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